chx2091 rohs compliant ref. : dschx20914097- 06 apr 04 1/4 specifications subject to change without notice united monolithic semiconductors s.a.s. route dpartementale 128 - b.p.46 - 91401 orsay cede x france tel. : +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 33 03 09 20-40ghz frequency multiplier gaas monolithic microwave ic description the chx2091 is a cascadable by 2 frequency multiplier monolithic circuit. it is designed for a wide range of applications, from military to commercial communication systems. the backside of the chip is both rf and dc grounds. this helps simplify the assembly process. the circuit is manufactured with a phemt process, 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. main features broadband performances: fin 17-20ghz 12dbm output power for +12dbm input power dc bias : vd=3.5volt@id=50ma chip size: 1.67 x 0.97 x 0.10 mm x2 main characteristics tamb. = 25c symbol parameter min typ max unit fin input frequency range 17 20 ghz fout output frequency range 34 40 ghz pin input power 12 dbm pout output power for +12dbm input power 10 12 dbm esd protection : electrostatic discharge sensitive device. observe handling precautions ! typical measurement -30 -25 -20 -15 -10 -5 0 5 10 15 16 17 18 19 20 21 22 23 input frequency (ghz) out power (dbm) pout (2*fin) pout (fin)
chx2091 20- 40ghz frequency multiplier ref. : dschx20914097- 06 apr 04 2/4 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 electrical characteristics tamb = +25c, vdd = 3.5v ; vg1 = -0.9v ; vg2 tuned for id=50ma ( # -0.4v ) ; pin = +12dbm symbol parameter min typ max unit fin input frequency range 17 20 ghz fout output frequency range 34 40 ghz pin input power 12 15 dbm pout output power for +12dbm input power 10 12 dbm is/fo fin rejection at the output ( 17 < fin < 20g hz) 22 25 dbc vswrin input vswr 2.5:1 vswrout output vswr 2.5:1 id bias current with rf , pin=+12dbm 50 70 ma absolute maximum ratings tamb = +25c symbol parameter values unit vd drain bias voltage 5 v id drain bias current 120 ma vg gate bias voltage -2 to +0.4 v pin input power 17 dbm ta operating temperature range -40 to +85 c tstg storage temperature range -55 to +155 c (1) operation of device above anyone of these param eters may cause permanent damage.
20-40ghz frequency multiplier chx2091 ref. : dschx20914097- 06 apr 04 3/4 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 typical on jig measurements bias conditions: vd = 3.5v , vg1 = -0.9v , vg2 tun ed for id = 50ma ( # -0.4v ) pout = f(vd) for pin = 12dbm fin = 20ghz vg2 tuned for id = 50ma ( # -0.4v ) 0 2 4 6 8 10 12 14 2 2,2 2,4 2,6 2,8 3 3,2 3,4 3,6 3,8 4 vd (v) pout 2*fin -35 -30 -25 -20 -15 -10 -5 0 pout fin pout ( 2*fin ) pout ( fin ) pout = f(vg2) for pin = 12dbm, fin = 20ghz & vd = 3,5v -8 -6 -4 -2 0 2 4 6 8 10 12 14 -1,6 -1,4 -1,2 -1 -0,8 -0,6 -0,4 -0,2 0 vg2 (v) pout 2*fin -35 -30 -25 -20 -15 -10 -5 0 5 10 15 20 pout fin pout (2*fin) pout (fin) pout = f(fin) for pin=12dbm -30 -25 -20 -15 -10 -5 0 5 10 15 16 17 18 19 20 21 22 23 input frequency (ghz) out power (dbm) pout (2*fin) pout (fin) po u t =f (pin ) te m p e r atu r e d e p e n d a n c e fo r f in =2 0 g h z 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 5 6 7 8 9 10 11 12 13 14 15 16 17 p in (dbm ) pout 2*fin (dbm) -40 -35 -30 -25 -20 -15 -10 -5 pout fin (dbm) fo u t=2 xfin (-4 0 c ) fo u t=2 xfin (2 5 c ) fo u t=2 xfin (+8 0 c ) fo u t=fin (-4 0 c ) fo u t=fin (2 5 c fo u t=fin (+8 0 c )
chx2091 20- 40ghz frequency multiplier ref. : dschx20914097- 06 apr 04 4/4 specifications subject to change without notice route dpartementale 128 , b.p.46 - 91401 orsay ce dex - france tel.: +33 (0)1 69 33 03 08 - fax : +33 (0)1 69 3 3 03 09 chip assembly and mechanical data vd = 3.5v vg1 = -0.9v vg2 tuned for id = 50ma ( # -0.4v ) 100pf 100pf 100pf to vg2 dc gate supply feed to vg1 dc gate supply feed to vd dc drain supply feed in out x2 note: supply feed should be capacitively bypassed . 25 m m diameter gold wire is to be prefered. pad size: 100 x 100m bonding pad positions 1670 +/- 35 1410 1070 740 490 415 415 970 +/- 35 (chip thickness: 100m. all dimensions are in micro meters) ordering information chip form : chx2091-99f/00 information furnished is believed to be accurate an d reliable. however united monolithic semiconductors s.a.s. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. no license is granted by impli cation or otherwise under any patent or patent rights of united monolithic semiconductors s.a.s. . specifications mentioned in this publication are subject to change without notice. this publication supersedes and re places all information previously supplied. united monolithic semiconductors s.a.s. products are not authorised for use as critical components in life support devices or s ystems without express written approval from united monolithic semiconductors s.a.s. x2 po ut ( 2*fin) f or several pin
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